|Department||Department of Information and Systems Engineering|
|takasima[ at ]kitakyu-u.ac.jp
＊Please change "[at]" to "@".
|Education||1998 D.E. from Tokyo Institute of Technology|
|Employment History||1998-2003: Research Associate, Japan Advanced Institute of Science and Technology, Japan
2003-2005: Invited Researcher, Kitakyushu Foundation for the Advancement of Industry, Science and Technology, Japan
2005-: Associate Professor, the University of Kitakyushu
|Teaching Activities||Theory of Combinatorial Optimization, Computer Architecture, Programming-Lab II|
|Research Interest||VLSI Layout Algorithm, Combinatorial Optimization, Design for Manufacturability|
|Publications||1) Masato Inagi, Yasuhiro Takashima, and Yuichi Nakamura, "Globally Optimal Time-multiplexing of Inter-FPGA Connections for Multi-FPGA Prototyping Systems," IPSJ Transactions on System LSI Design Methodology, Vol.3, pp.81--90, 2010.
2) Masatomo Kuwano and Yasuhiro Takashima, "Stable-LSE based Analytical Placement with Overlap Removable Length", Proc. of SASIMI 2010, pp. 115--120, 2010.
3) Takanobu Shiki, Yasuhiro Takashima, and Yuichi Nakamura, "Delay Analysis of Sub-Path on Fabricated Chips by Several Path-delay Tests", Proc. of ISCAS 2010, pp. 1595--1598.